Changhoon Yeo

Changhoon Yeo is a seasoned professional in ASIC design engineering, currently serving as an SMTS ASIC Design Engineer at AMD. Prior experience includes holding positions as a Senior Staff ASIC Design Engineer at SK hynix memory solutions inc., an ASIC Design Engineer (Architect) at Wipro, and a Senior Engineer at LG Electronics. Changhoon Yeo holds a Master of Engineering in Electronic Engineering and a Bachelor's degree in the same field, both from Yonsei University, with graduate studies completed between 2002 and 2004 and undergraduate studies from 1995 to 2002.