Naveen D

Naveen D is a Sr. Silicon Design Engineer at AMD, where they apply their expertise in VLSI design and verification. Naveen previously worked as a project trainee at ANURAG Labs, DRDO, focusing on the verification of digital video broadcasting IP. They have developed skills in SystemVerilog and UVM methodologies and contributed to several projects, including a verification environment for the APB protocol. Naveen holds a Master’s degree in Embedded Systems and VLSI Design and has completed a proficiency program in Project Management at the Indian Institute of Science.