Payton Burak

Payton Burak is a Silicon Design Engineer 2 at AMD since September 2023, specializing in microprocessor RTL logic design within the Cache Hierarchy group. Prior experience includes a role as a Graduate Research Assistant at the Rochester Institute of Technology, focusing on secure and customizable block cipher design, which includes work with a pending patent. Payton also served as a Graduate Teaching Assistant for a cryptographic applications course and graded assignments for the Computer Architecture course. Earlier positions include an internship as a Digital Design and Verification Engineer at AMD, as well as a Computer Engineer Co-op at Annapolis Micro Systems, Inc., where work involved developing APIs for FPGA-based high-performance computing. Education comprises a dual degree (BS/MS) in Computer Engineering from Rochester Institute of Technology, completed in 2023.