Piyush Kasat

Piyush Kasat is a skilled electrical engineer with extensive experience in RTL design and verification, currently serving as a Member of Technical Staff at AMD since March 2019. Prior to this role, Piyush worked as an RTL Engineer at Atomic, contributing to a stealth mode ASIC project in FinTech, and at REX Computing, where responsibilities included the tape-out of a 64-bit VLIW processor and the development of a full-chip verification API. Piyush began the career as an ASIC Design Intern at Scalable Systems Research Labs and has also held various positions in ESD applications engineering and digital design during early professional years. Piyush holds a Master of Science in Electrical Engineering from San Jose State University and a Bachelor of Engineering in Electronics and Telecommunication Engineering from the University of Mumbai.