Theo Drane is a Fellow Silicon Design Engineer at AMD, leading the Graphics Numerical Hardware Group focused on architecting, implementing, optimizing, and verifying mathematically intensive hardware. Previously, they served as a Principal Datapath Engineer at Imagination Technologies, where they led a multidisciplinary consultancy group while completing a PhD at Imperial College London. Throughout their career, Theo has held various roles, including Vice President at Markit and Software Architect at Cadence Design Systems. They are also a Council Member of the Computing Research Association. Theo holds a Master's degree in Mathematics from the University of Cambridge and a PhD from Imperial College London.
This person is not in the org chart
This person is not in any teams
This person is not in any offices