Roopesh Pyneni

Roopesh Pyneni currently serves as an Analog Design Engineer at Allegro MicroSystems, starting in January 2024. Prior experience includes an Interim Engineering Intern position at Qualcomm, where involvement in the RF circuit design team focused on developing algorithms to enhance RF circuit performance. Roopesh also held an Analog Engineering Intern role at Texas Instruments, designing a testbench for High-Speed Data Capture and programming an FPGA for data acquisition from High-Speed and High-Resolution Analog to Digital Converters. As Group Lead for the Electrical Subsystem at Team Avishkar Hyperloop, leadership of an 11-member team led to the design and integration of a power system, inverter, and control mechanism into a Hyperloop Pod prototype. Roopesh holds a Master's degree in Electrical, Electronics, and Communications Engineering from the Georgia Institute of Technology, and a Bachelor's degree in Electrical Engineering from the Indian Institute of Technology, Madras. Educational achievements also include a Higher Secondary School degree with a 96.6% in Science from Chettinad Vidyashram, and a perfect CGPA of 10.0 in Secondary School from the same institution.