Harshitha Ranganatha

Design and Verification Engineer at Alphawave IP

Harshitha Ranganatha is a Design and Verification Engineer at Alphawave IP Group since January 2022, previously serving as a Junior ASIC/FPGA Engineer at Precise-ITC, Inc. from June to December 2021. Harshitha has also held the position of Lead Instructor at CODE-IT HACKS, teaching elementary and middle school students from November 2019 to May 2021, and completed a project as a Project Trainee at URSC - U R Rao Satellite Centre in early 2019, focusing on building a reconfigurable modulator using Virtex-5 FPGA with VHDL on Xilinx-ISE. An internship at Bharat Electronics Limited in mid-2018 involved studying the X-band missile system and its Environmental Stress Screening. Harshitha holds a Master of Engineering in Computer Engineering from the University of Toronto (2019-2021) and a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Ramaiah Institute of Technology (2015-2019).

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