Chethan J

Chethan J is a Principal DFT Engineer with nine years of dedicated experience in DFT design. Currently, Chethan works at Ampere, previously holding positions at KeenHeads and Tessolve, where they specialized in scan insertion, ATPG pattern generation, and verification processes. Chethan has also contributed extensively to DFT design and clocking architecture at Kenforce and imspired technologies. With a comprehensive skill set in post silicon debug and verification techniques, Chethan is focused on advancing their career in the field.