Chirag Patil

Chirag Patil has a diverse range of work experience in the field of engineering and technology. Chirag began their career at the University of Colorado Colorado Springs as a Physics Researcher, where they worked on various projects involving RF circuits, nanowires, liquid crystals, and quantum dots. Following this, Chirag interned at Atmel Corporation as an Associate Engineering Intern, where they gained experience in circuit design, layout, and HSPICE verification.

Chirag then joined Intel Corporation, where they took on multiple roles. As a SoC Logic Design and Verification Intern, they worked on verifying PCIe subsystem models and refactoring register models. Later, as a SOC IP Validation Engineer, Chirag developed and maintained testbench collateral for memory IPs and contributed to testplanning and content development for features implemented at the SOC level. Chirag also played a key role in designing a new testbench methodology for APIC validation, resulting in significant time savings for the project.

Chirag's most recent role was at Andes Technology Corporation as a CPU Verification Engineer, where they currently work. Additional details about this role are not provided in the information. With their strong background in CPU verification, coverage scripting, and automation, Chirag brings valuable expertise to their current position.

Chirag Patil pursued a Bachelor's Degree in Electrical Engineering from the University of Illinois Urbana-Champaign, starting in 2012 and completing it in 2016. Following this, they enrolled at Portland State University in 2020 to attain a Masters in Electrical and Electronics Engineering, which they concluded in 2021. No further information about Chirag Patil's education history is provided.