Dragan Jovanovic

Dragan Jovanovic is a Design Verification Engineering Manager at Apple with extensive experience in verification engineering. They have a strong background in System Verilog, UVM, OVM, and VMM methodologies, backed by 9 years in the field. Previously, Dragan held leadership and verification roles across various companies, including Veriest, Synopsys, and Microsoft, where they demonstrated exceptional mentoring and communication skills. Dragan earned a reputation for successfully leading teams and collaborating with numerous clients throughout their career.