Farhad Parsan is a Power Verification Engineer at Apple Inc., where they develop power patterns for mobile product lines and analyze power alongside logic design teams. They hold two PhDs in Electrical Engineering from the University of Arkansas and the University of Missouri-Rolla, achieving a perfect GPA of 4.0. Previously, Farhad interned as a Hardware Design Engineer at ASML, focusing on RTL design and FPGA implementation for DSP. Farhad has also served as a Graduate Research and Teaching Assistant at the University of Arkansas, specializing in digital design and verification.
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