TW

Tie Wang

IC Packaging Integration Engineer

Tie Wang has extensive experience in various roles within the semiconductor and packaging industry. Tie Wang's career includes positions such as Director of Back-end Development and Operation at ALLVIA, Inc., RF Front-End Module Packaging Engineer at Qualcomm, and IC Packaging Integration Engineer at Apple. Previous roles also include Senior and Principal Member of Technical Staff at Maxim Integrated, with responsibilities in wafer-level packaging and system integration assembly development. Tie Wang's early career involved leading a team at Ablestik Laboratories and serving as Technical Manager at Advanpack Solutions, focusing on advanced packaging materials and underfill formulation. Tie Wang holds a Ph.D. in Surface Science in Chemical Engineering from the National University of Singapore and a Master's Degree in Polymer Science in Chemical Engineering from Dalian University of Technology.

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San Francisco, United States

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