Vanita Iyer

Vanita Iyer is an accomplished Engineering Program Manager at Apple, bringing extensive expertise in mixed signal IC design with a focus on high-speed serial I/O architectures. Prior to this role, Vanita contributed significantly to Intel Corporation, where they served as a Senior Analog Design Engineer, leading teams in the design of next-generation LC PLLs and developing improved testing frameworks that reduced validation time. Vanita's background also includes deep knowledge in DFT architecture, having developed standardized solutions that enhanced test coverage across various platforms. They hold a Master of Science and Bachelor of Science in Electrical Engineering from Arizona State University and Osmania University, respectively.