Canberk Topal is a Senior Design Engineer at Arm since March 2025, with prior experience as a Senior Digital Design Engineer at Riverlane, where contributions included the design of a quantum error correction system. Earlier roles include a Hardware/Software Engineer position at lowRISC CIC, focusing on the OpenTitan project and various processor design verifications. Canberk also held a Graduate Hardware/Software Engineer position at Dialog Semiconductor, responsible for RTL design and signoff activities for Power Management ICs. Internship experiences include positions at HAVELSAN, working on 5G communication technologies, and Aselsan, where involvement included documentation and waveform testing for military applications. Canberk holds a Bachelor of Science degree in Electrical, Electronics, and Communications Engineering from Istanbul Technical University.
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