Santosh Vedula

Santosh Vedula is a Principal Engineer at Arm, where they have worked since May 2019. With over 12 years of industry experience in ASIC/IP/SOC design verification, Santosh has held roles ranging from Project Engineer at Wipro Technologies to Technical Lead and ASIC Engineer positions. They have also contributed to the verification team at Juniper Networks and have a strong background in UVM-based IP verification and ARM/DSP assembly projects. Santosh holds a B.E. in Electronics & Communications from Andhra University and a PGDM in General Management from the Indian Institute of Management, Lucknow.