Stefi Bhavsar is a seasoned engineer with extensive experience at Arm since November 2015, holding various titles including Staff Engineer, Senior Design Engineer, and Design Engineer, where contributions have primarily focused on ROM compiler design in 28nm technology. Key achievements include statistical analysis of ROM bitcells and sense amplifiers, margin analysis, design fixes, performance improvements, and characterization of memory circuits regarding timing and power. Prior to Arm, Stefi gained valuable experience as an intern in the Standard Cell Development Group at ARM Embedded Technologies, contributing to design changes and circuit design optimization for power and delay. Stefi holds a Master of Technology in VLSI Design from Nirma University and a Bachelor of Engineering in Electronics & Communication from Gujarat Technological University.
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