Virendra Shah

Virendra Shah is currently a Principal Design Engineer at ARM, where they focus on RTL design for ASICs using Verilog and microarchitecture development. They previously held various roles at Qualcomm from 2021 to 2023, including Staff Engineer and Senior Lead Engineer. Virendra has also worked as a Staff Design Engineer at Microsemi Corporation and a Senior Product Design Engineer at PMC-Sierra, among other positions. They earned a PG Diploma in VLSI and Embedded System Design from the Centre for Development of Advanced Computing and a Bachelor's degree in Electronics and Telecommunications from the University of Pune.