Saad Z.

Saad Z. has a diverse and extensive work experience spanning over two decades. Saad has held various roles in different companies, showcasing a wide range of skills and expertise.

Saad first worked at Conexant as a Staff Verification Engineer from 1998 to 2003. During this time, they focused on testing and improving the Switch Fabric, achieving a significant increase in coverage for ASICs.

From 2003 to 2004, Saad worked at Axiom Design Automation as a Senior Corporate Application Engineer. Here, they developed a System-Verilog QA environment and a comprehensive test suite for VERA programming constructs.

At Tellabs Inc., Saad served as a Senior Verification Engineer from 2004 to 2008. Saad was responsible for developing cycle accurate reference models and test environments, analyzing packet scheduler performance, and ensuring required rates at multi-block and system levels.

From 2008 to 2009, Saad worked at Netronome Systems as a Senior Member of Technical Staff. During this time, they contributed to the verification environment of the NFP-32xx chipset.

Saad then joined Huawei as a Verification Lead from 2009 to 2012. Saad led the verification efforts for the SMART MEMORY project, which involved developing and testing IBM embedded EDRAM and multi-threaded packet processing engines.

From 2012 to 2015, Saad worked at HGST, a Western Digital company, as a Sr. Principal Verification Engineer/Verification Architect + Lead. Saad led the verification efforts for the Data Processing Sub-System of the Next-Gen controller for a high-performance SAS/SATA Enterprise-Class SSD Controller.

At Oracle Labs, Saad served as a Consulting Member of Technical Staff from 2015 to 2016. Saad worked on the RAPID Project, focusing on large-scale data management and analysis to improve energy efficiency in database-processing systems.

Currently, Saad is the Director of Engineering at Arteris IP. Since 2017, they have been leading the verification effort of the company's state-of-the-art coherent interconnect, utilizing auto-generation of flexible UVM test-benches and SystemC AT modeling for performance verification.

With their extensive work experience and expertise in verification engineering and performance analysis, Saad Z. has developed a strong skill set that enables him to contribute effectively to various technology-driven projects.

Saad Z. completed their Bachelor of Science in Electrical Engineering at NED University of Engineering and Technology. Saad then pursued further education and obtained a Master of Science degree in Electrical Engineering from The University of Texas at San Antonio, completing their studies between 1996 and 1998.