Sai Pavan Yaraguti

Sai Pavan Yaraguti has extensive work experience in the field of engineering and verification. Sai Pavan is currently working at Arteris as a Staff Verification Engineer since March 2022. Prior to that, they worked at the same company as a Senior Verification Engineer from March 2021 to March 2022.

Before joining Arteris, Sai Pavan worked at Maxim Integrated as a Member Of Technical Staff from November 2016 to March 2021. Sai Pavan also gained experience as a Design Verification Engineer at Cirrus Logic from March 2014 to October 2016.

Sai Pavan's career started at Cirrus Logic as a Design Verification Intern from August 2013 to January 2014. Sai Pavan also worked as a Graduate Teaching Assistant for C language and MATLAB at Auburn University from August 2011 to August 2013.

Overall, Sai Pavan Yaraguti has a strong background in engineering and verification, with experience in various roles and companies.

Sai Pavan Yaraguti completed their Bachelor of Technology degree in Electronics and Communication Engineering from Jawaharlal Nehru Technological University from 2007 to 2011. Sai Pavan then went on to pursue their Master of Science degree in Electrical Engineering at Auburn University, which they completed from 2011 to 2013.