Arteris
Zaid B. Rodriguez has a diverse work experience in the semiconductor industry. Zaid B. currently holds the position of Sales Director, North America at Arteris IP starting in July 2021. Prior to that, Zaid worked at Cadence Design Systems from 2016 to 2021, where they served as Sr. Product Marketing Manager, Product Management System and Verification Group. Zaid B.'sresponsibilities included product definition, brand awareness, pricing, positioning, sales enablement, business development, field support, and customer engagement support on a global level.
Before joining Cadence, Zaid held various roles at Mentor Graphics, starting as a Northwest US Sales Manager at Tanner EDA, which was later acquired by Mentor Graphics. Zaid B. also worked as a Sales Manager for the Northwest US region at Berkeley Design Automation, another company acquired by Mentor Graphics, and as an Account Manager at Oasys Design Systems, also acquired by Mentor Graphics.
Zaid's previous experience includes working as a Strategic Account Manager at Atrenta Inc., where they were responsible for technical and sales campaigns of Nextop Bugscope software in North America. Zaid B. also served as a Sales Director at NextOp Software Inc. before its acquisition by Atrenta Inc. Zaid B.'sresponsibilities at NextOp included sales and marketing of Nextop's targeted functional verification solution.
Zaid's earlier experiences include working as the North America Sales Director at OneSpin Solutions GmbH and Senior Account Manager Technology at Cadence Design Systems. Zaid B. also served as a Territory Director at Jasper Design Automation Inc. before it was acquired by Cadence Design Systems.
Throughout their career, Zaid has demonstrated their expertise in sales, marketing, product management, business development, and customer engagement in the semiconductor industry.
Zaid B. Rodriguez pursued their education in Electrical Engineering at The City University of New York. Zaid B. obtained their Bachelor of Engineering (BE) degree from the university during the period of 1987 to 1991. Later, they continued their studies in the same field by pursuing a Master's Degree in Electrical Engineering from The City University of New York, which they successfully completed between 1993 and 1994.
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Arteris
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Arteris is helping power the next wave of autonomous driving, 5G and Artificial Intelligence (AI) systems fueling the growth the of the semiconductor industry. Our Network-on-Chip (NoC) interconnect semiconductor intellectual property (IP) is the on-chip communications backbone of most of the world’s most important and sophisticated systems-on-chip(SoC). Optimizing on-chip dataflow and connectivity is the cornerstone of our vision for system-on-chip development and assembly. Since our inception in 2003, we have pioneered the development and commercialization of NoC interconnect technology, cementing our position as the world’s first and largest commercial NoC interconnect IP company. Our unique technology meets the needs for cache coherent and non-coherent on-chip communications, on-chip data caching, and on-chip data protection to meet functional safety requirements.ARTERIS IP PRODUCTS AND SOLUTIONSOur on-chip NoC-based interconnect IP products make systems-on-chip easier to develop, perform better, and faster to get to market.The Arteris IP product portfolio meets the needs of design teams creating nearly any type of digital logic SoC with any type of communications semantics. Our seminal FlexNoC® Interconnect IP pioneered the market for NoC interconnects and is the industry leader. The highly configurable Ncore® Cache Coherent Interconnect IP allows optimal integration of cache-coherent Arm®-based processor IP with other cache-coherent and non-coherent IP.The growth of Artificial Intelligence (AI) and Machine Learning (ML) has inspired the creation of two innovative products. The Arteris IP AI Package is an option to Arteris FlexNoC that provides automated means to create complex topologies (meshes, rings, and tori) while adding multicast/broadcast communications, virtual channels, and source-synchronous communications to meet the unique needs of AI/ML chips. The CodaCache® Last Level Cache provides a highly configurable cache that can be instantiated anywhere within an SoC interconnect, providing data locality wherever needed.To meet the needs of the new generation of multibillion-transistor chips for automated systems with functional safety requirements, Arteris IP also offers Resilience Packages that provide hardware-based data protection technologies as well as automated diagnostic coverage analysis to help meet requirements ISO 26262 and IEC 61508 functional standards. Resilience Packages are available for FlexNoC, Ncore and CodaCache IP products.Timing closure has become a key design schedule constraint as chips have grown in size and complexity and semiconductor manufacturing process critical dimension have shrunk. To address this, Arteris IP created the PIANO® Timing Closure Package which provides physical and timing information about the interconnect to back-end synthesis place and route tools to help ensure faster timing closure.