Abdul Rafay

Principal Design Verification Engineer at Astera Labs

Abdul Rafay has a diverse work experience spanning multiple companies and roles. Abdul'smost recent position is as a Principal Design Verification Engineer at Astera Labs, starting in April 2022. Prior to that, they worked at AMD as a Member Of Technical Staff in Silicon Design Verification from August 2020 to April 2022.

Before joining AMD, Abdul Rafay was a Sr. Design Verification Engineer at Xilinx from February 2018 to August 2020. Abdul'sresponsibilities at Xilinx included architecting and implementing verification environments using System Verilog, UVM, and assertion-based testing. Abdul also applied Constrained-Random, Coverage-Driven, and Formal verification techniques.

Abdul Rafay gained experience as a Graduate Intern in ASIC Digital Design and Verification at Synopsys Inc from October 2017 to January 2018. Abdul also worked as a Research Assistant at iRadio Lab at the University of Calgary from May 2016 to September 2017.

Earlier in their career, Abdul Rafay held positions at Ericsson as an Implementation Coordinator from December 2014 to April 2016 and as a RAN Supervisor from August 2013 to June 2014. Abdul also worked at CMPak as a Project Engineer (3G) from August 2014 to November 2014. At Ericsson, they were responsible for coordinating implementation tasks and overseeing the Radio Access Network.

Abdul Rafay started their career as a Hardware Design Engineer at Digitek Engineering from March 2012 to May 2013 and later worked at Digitec Systems as a Development Engineer from June 2011 to February 2012.

Abdul Rafay completed their education as follows:

- From 2016 to 2018, they pursued a Master's Degree in Electrical and Computer Engineering at the University of Calgary.

- During the period of 2008 to 2011, they attended the NED University of Engineering and Technology, where they obtained a BE degree in Electronics.

- Between 2005 and 2007, they studied at The Fahims School System, focusing on Pre-Eng as part of their GCE A Level qualification.

- Abdul'sinitial academic foundation was established from 2000 to 2005 at St. Michael's Convent, where they completed their GCE O Level degree in Pre-Eng.

In addition to their formal education, Abdul Rafay has obtained various certifications, including:

- C++ Essential Training from LinkedIn (obtained in December 2021)

- Introduction to Quantum Computing from LinkedIn (obtained in September 2021)

- Learning Python from LinkedIn (obtained in September 2021)

- Strategic Thinking from LinkedIn (obtained in September 2021)

- Huawei IP Products Training (NE40, S9300, E8000) from Huawei Technologies (obtained in September 2014)

- Sun Certified Programmer for Java 2 Platform from Sun Microsystems (obtained in April 2002)

- Certified LabView Associate Developer from National Instruments (obtained in June 2016)

- Abdul has also received certifications from Cadence Design Systems in the following areas, though specific dates were not provided: Virtuoso Analog Design Environment, Virtuoso Layout Design Basics, and Virtuoso Schematic Editor.

Links

Previous companies

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Timeline

  • Principal Design Verification Engineer

    April, 2022 - present