Karthik Rajamane

Karthik Rajamane has extensive work experience in the field of design verification engineering and software development. Karthik is currently working as a Design Verification Engineer at Astera Labs since April 2022. Prior to this, they worked at Xilinx as a Design Verification Engineer from April 2021 to March 2022.

Before entering the design verification field, Karthik worked at Cadence Design Systems in various roles. Karthik served as a Principal Software Engineer from October 2020 to April 2021, as a Lead Software Engineer from June 2017 to October 2020, and as a Design Engineer II from March 2015 to June 2017.

Their career started at Information Technology Services, where they worked as a Student Technical Assistant from August 2013 to May 2014. In this role, they provided technical support in classrooms, loaned out university laptops to students, and maintained the computer library.

Prior to that, Karthik worked at IBM India Private Limited as an Application Developer from August 2010 to July 2012. Karthik specialized in Rational Focal Point (RFP), a Product Portfolio Management software, where they developed and implemented business rules for inter-module message passing within RFP.

Karthik also has experience as a Design Engineer at Rajamane Electronics from December 2010 to March 2012.

Overall, Karthik Rajamane has gained expertise in design verification engineering, software development, and technical support throughout their career.

Karthik Rajamane pursued their Bachelor of Engineering degree in Electrical and Electronics Engineering from Bangalore Institute of Technology from 2006 to 2010. Subsequently, they obtained a Master's degree in Electrical and Electronics Engineering from the University of Southern California between 2012 and 2014.