Sarvesh Shrivastava

Sarvesh Shrivastava is a seasoned professional in the field of electrical and electronics engineering, holding a B. Tech. from the Indian Institute of Technology, Kanpur, and a Master of Science from the University of Minnesota College of Science and Engineering. Sarvesh has accumulated extensive experience in leadership roles, including Director of Silicon Engineering at Astera Labs, Director of ASIC Design at InvenSense, Director of IP Design at Cadence Design Systems, and a Senior Staff Engineer/Manager at Qualcomm. Additionally, Sarvesh served as a Digital Designer/IP Lead at Nvidia, showcasing a strong background in advanced design and engineering within the technology sector.