Madhusudan S

Madhusudan S is a Senior Staff Engineer at Aura Semiconductor since October 2021, specializing as a Chip Lead for High Performance Clock Buffer ICs for PCIE applications, engaging in design, bring-up, ATE support, and silicon characterization. Previously, Madhusudan served as a Senior Staff RFIC Design Engineer at MaxLinear from April 2018 to September 2021, working on cellular base station transceivers and collaborating across multiple teams throughout the project lifecycle. Madhusudan's earlier experience includes roles as an Analog RFIC Design Engineer at Aura Semiconductor from July 2012 to March 2018, focusing on 2.4GHz BTLE front-end designs, and as an Analog Design Engineer at Broadcom and SiRF Technology, where contributions involved EPHY line driver designs and linear voltage regulators, respectively. Madhusudan holds a Master of Engineering in Microelectronics from the Indian Institute of Science (2007) and a Bachelor of Technology in Electrical and Electronics Engineering from the National Institute of Technology, Tiruchirappalli (2005).