Vijay Vardhan Gupta

Vijay Vardhan Gupta is a seasoned engineering professional with extensive experience in design engineering and program management. Currently serving as the Director of Design Engineering at Axiado Corporation since August 2025, Vijay has previously held significant roles such as Director of ASIC Programs at Alphawave IP Group and Director of ASIC Design at SiFive. Other notable positions include Associate Director at SYNAPSE TECHNO DESIGN INNOVATIONS PRIVATE LIMITED and Engineering Manager at Aricent and Intel Corporation, where responsibilities encompassed full-chip SoC integration and multi-million gate graphics core design. Vijay's career also includes contributions to 0-in design automation as MTS and educational experience at UC Santa Cruz. An alumnus of Motilal Nehru National Institute of Technology, Vijay holds a strong foundation in engineering principles.