Rushikesh Wani

Rushikesh Wani is currently a Design Verification Engineer at BITSILICA since February 2023. Prior to this role, Rushikesh completed a training program at VLSIGuru Training Institute from February 2022 to December 2022, focusing on front-end design, testbench development using Verilog HDL, and verification with System Verilog and UVM methodology. Additionally, Rushikesh interned at Internshala from May 2020 to January 2021. Educational qualifications include a Bachelor of Technology in Electrical and Electronics Engineering from MIT Academy of Engineering, Alandi, Pune (2017-2021) and ongoing postgraduate studies in Micro Electronics and VLSI at BITS from January 2025 to December 2026.