Nitisha Jain

Nitisha Jain is an accomplished RTL Design Engineer at Block since August 2022, with prior experience as a Senior and Junior Application Engineer at Synopsys Inc, focusing on FPGA prototyping tools and expertise in UPF and clock handling. Previous roles include Member of Technical Staff at Chelsio Communications, and an FPGA RTL verification Intern at a stealth-mode semiconductor startup, where Nitisha contributed to cloud-based storage solutions using NVME specifications. Earlier experience includes serving as a Research Assistant at San Jose State University, where work involved FPGA prototyping for Software Defined Networks, and multiple positions at Samsung Electronics, where firmware refactoring and decoder development for video codecs were key responsibilities. Nitisha's educational background includes a Master’s Degree in Electrical Engineering from San José State University and a Bachelor of Technology in Electronics and Communication from the Indian Institute of Technology (Indian School of Mines).