Eric Naviasky

Eric has been designing analog and mixed-signal integrated circuits for the last 35+ years for a wide variety of applications including commercial, RF communication, biomedical and aerospace. He was formerly Fellow/Chief Architect for Cadence Design Systems’ high-performance PHY and analog AFE IP group, where he was one of the original founders for their analog/mixed-signal design services in 1996. Mr. Naviasky has written numerous publications and holds several dozen patents in the field of analog IC design. He earned a BSEE degree from Johns Hopkins University.