CV

Chaya V

ASIC FPGA Design Verification engineer at Boeing

Chaya V is an experienced engineer specializing in FPGA and ASIC design verification, currently employed at Boeing since November 2021. Prior to this role, Chaya worked at SION Semiconductors Private Limited as an FPGA Design engineer from June 2020 to May 2021, and briefly at Entuple Technologies Pvt. Ltd. in custom IC design from July 2020 to September 2020. Chaya holds a Master of Technology in VLSI design and embedded systems from Bangalore Institute of Technology, completed in 2021, and a Bachelor's degree in Electronics and Communication Engineering from M. S. RAMAIAH University of Applied Sciences, awarded in 2019.

Location

Bengaluru, India

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