Kapil Bajaj

Kapil Bajaj is a Principal Engineer at Broadcom Inc. since October 2019, with prior experience at Intel Corporation from July 2006 to September 2019, where Kapil held roles as Datapath Lead and Engineering Manager in BigCore, focusing on the design of Intel core functional blocks, section timing convergence, and team management, as well as serving as a Design Engineer for SoCs, Memory Circuit Designs, and compilers. Kapil holds a Master of Technology (M.Tech.) in Electronics Design, VLSI from the Indian Institute of Science (IISc), completed in 2006, and a B-Tech in Electronics and Communication from Kurukshetra University, obtained in 2003.