Éricles Sousa

Éricles Sousa is a highly experienced Senior Principal Application Engineer at Cadence, specializing in system-level performance modeling and architecture exploration, with a strong focus on automotive SoCs. Éricles leads cross-functional collaborations, guides customers in co-design strategies, and defines reference architectures for chiplet-based designs. Previous roles at Infineon Technologies included Senior Staff Engineer Digital Design, where Éricles led concepts for embedded non-volatile memory architectures. Éricles began a career at FAU Erlangen-Nürnberg as a Scientific Research Assistant, contributing to research on reconfigurable memory architectures. Éricles holds a PhD in Electrical Engineering and Computer Science from FAU Erlangen-Nürnberg and an MSc in Electrical Engineering from Universidade Estadual de Campinas.