Cadence Design Systems
Fangyu Ke is a Principal Design Engineer at Cadence Design Systems, specializing in digital design for high-speed Serdes IP since January 2021. Previously, Fangyu held the position of ASIC Design Engineer at NUVOTON TECHNOLOGY CORPORATION AMERICA from October 2014 to December 2020. Educationally, Fangyu holds a Master of Science in Electrical and Computer Engineering from the University of Rochester (2012-2014), and a Bachelor of Science in Electrical and Automatic Engineering from Guilin University of Electronic Technology (2008-2012). Additionally, Fangyu attended Stanford University for further study in 2013.
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