Cadence Design Systems
Minal Nemade currently serves as the SI/PI Lead Application Engineer at Cadence Design Systems, starting in February 2024. Prior experience includes roles as a Hardware Engineer at Solidigm from January 2022 to March 2024, and as an SSD Hardware Design Engineer at Intel Corporation from June 2017 to December 2021. Minal began professional experience as a Graduate Trainee Engineer at Bharat Automotive Pressings - India from August 2014 to May 2015. Earlier, an internship at SKF India Ltd provided valuable experience in upgrading machinery with programmable logic controllers. Minal holds a Master’s Degree in Electrical Engineering from Wayne State University (2015-2017) and a Bachelor’s Degree in Electronics and Telecommunication from Pimpri Chinchwad College Of Engineering (2011-2014).
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