Santhosh Rapolu is a Senior Design Engineer at Tech Mahindra Cerium Pvt Ltd since April 2022, with prior experience as a Silicon Design Engineer 2 at AMD from March 2020 to March 2022. Santhosh's background includes roles as a Physical Design Engineer at HCL Technologies from February 2019 to March 2020 and at ARICENT TECHNOLOGIES (HOLDINGS) LIMITED from January 2018 to February 2019. Santhosh holds a Master of Technology in Microelectronics from the BITS Pilani Work Integrated Learning Programmes, completed in December 2022, and a Bachelor's degree in Electronics and Communications Engineering from Osmania University, awarded in 2017.
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