Andrew Handke

Andrew Handke is a Senior Manager in Hardware Engineering, specializing in FPGA Design and Verification at Ciena, where they have worked since 2020. They previously held positions at Cisco Systems as a Hardware Engineer and at Ciena as an FPGA Design & Verification Engineer. Andrew began their career with a co-op role as an RF Design Engineer at Sanmina-SCI and also completed an Undergraduate Research Assistantship at the University of Waterloo, where they earned a BASc in Electrical Engineering in 2011.