Gurjit Nijjar

Gurjit Nijjar is a seasoned engineering professional with extensive experience in ASIC design and verification. Currently serving as Sr. Manager ASIC Engineering at Ciena since January 2023, Gurjit previously held pivotal roles at Tibit Communications, Inc., including Manager ASIC Verification and Principal ASIC Engineer. Prior to that, Gurjit worked at Oracle as Principal ASIC Verification Engineer, where responsibilities included developing verification environments for Infiniband switch chips using System Verilog and VMM. Additional experience includes positions at Broadcom, Alcatel USA, Crimson Microsystem, Calix Networks, Hewlett Packard, and Integrated Circuit Systems, Inc., showcasing a comprehensive background in design engineering and consultancy. Education was completed at UCSC Silicon Valley Extension.