Paul Payton

Paul Payton has extensive experience in verification management and engineering, primarily in the semiconductor industry. Currently serving as Verification Manager at Cirrus Logic since August 2014, Paul has led design verification for mixed signal products and managed the MEMS-microphone division. Previous roles include Senior Verification Consultant at Cirrus Logic, Verification Contractor at Correct Designs, and Verification Engineer for Oracle, AMD, IBM, Cisco, AppliedMicro, Intel, and Zoran, gaining expertise in system-level verification, advanced mixed signal products, and various verification methodologies such as SystemVerilog and UVM. Paul holds a Master of Science in Electrical and Electronics Engineering from The University of Texas at Austin and a Bachelor of Science in Computer Engineering from Purdue University.