Rajat Jain

Rajat Jain is a highly skilled Technical Leader at Cisco, with over a decade of experience in the hardware design domain, focusing on advanced Edge Routing products and the ASR9K routing portfolio. Since joining Cisco in May 2010, Rajat has played a pivotal role in the development of next-generation 400/800G optics and has recently led hardware engineering efforts on a 32x100G line-card project. Prior to this role, Rajat served as a Sr. Field Applications Engineer at Xilinx, providing critical support for FPGA and CPLD designs related to the Catalyst 6500 platform, and contributed as a Hardware Engineer at Cisco, where responsibilities included designing 1G/10G Ethernet switching line cards. Rajat holds an MBA and an MSE from San Jose State University, along with a BS in Electrical and Computer Engineering from the University of California, Davis.