Sajid Khan

Sajid Khan, PhD, is an experienced ASIC Verification Engineer at Cisco, where they lead the verification of a complex routing table manager block, focusing on gate-level simulations and multi-chip integration. Prior to this, they worked at Intel as a SoC Verification Engineer, managing multi-chip model bring-up for server SoCs and optimizing CPU core activation. Sajid earned a PhD from the Indian Institute of Technology, Indore, where their research centered on low-power secure circuit design and cryptographic techniques, contributing to a strong publication record in their field. Their career reflects a blend of academic excellence and practical experience in verification engineering and semiconductor design.