Sarat Dasaka

Sarat Dasaka is a seasoned hardware test engineer currently employed at Cisco since August 2025. Previously, Sarat served as a product development architect at Altera from August 2022 to August 2025, leading a scan team focused on the development and integration of ATPG content for FPGA products, and managing various aspects of scan development and pre-silicon verification. Prior experience includes a role as a product development engineer at AMD from June 2021 to August 2022, where Sarat developed test strategies for advanced node FPGAs. At Intel Corporation, from November 2000 to May 2021, Sarat held positions as a DFT design engineer and product development engineer, overseeing manufacturing test development across multiple phases and leading scan teams from architecture to high-volume ramp. Educational achievements include a Master of Science in Electrical Engineering from Wright State University and a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Andhra University.