Andrew Sawyer

RF And FPGA Design Engineer at Citadel Securities

Andrew Sawyer has a diverse work experience that spans several roles and companies. Andrew began their career as an Engineer Intern at Madico, Inc. in 2008 and 2009. In 2010, they joined Phonon Corporation as an RF Design Engineer, where they played a crucial role in the design, research, and test/qualification of SAW oscillator products for space and military applications. Andrew then moved to Northrop Grumman Corporation in 2014, where they served as an FPGA and RF Design Engineer. In this role, they were responsible for writing VHDL, simulating FPGAs, and conducting lab testing and qualification for airborne military defense applications. Andrew also worked as the lead designer of RF circuit card assemblies. Most recently, they joined Citadel Securities in 2018 as a Hardware Engineer.

Andrew Sawyer attended the University of Connecticut from 2006 to 2010, where they obtained a Bachelor of Science (B.S.) degree in Electrical Engineering. During their time at the university, they also pursued a Minor in Mathematics, with a focus on Electrical and Electronics Engineering.

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