Jeffery Bond

Jeffery Bond is a Principal CPU Design Engineer at Codasip, where they focus on digital ASIC and FPGA design using Verilog and VHDL. Previously, they served as a Principal Hardware Design Engineer at Imagination Technologies and held various engineering roles at NVIDIA, Clearspeed Technology Plc, and NEC Technologies Ltd. Jeffery earned a BSc (Hons) in Physics from The University of Sheffield from 1999 to 2001. Their extensive experience spans over two decades in silicon design and hardware engineering.