Victor Ruskovoloshin

Victor Ruskovoloshin has a strong background in FPGA and ASIC design. Victor currently holds the position of Senior FPGA/ASIC Designer at Cornami, Inc. since March 2019. Prior to this, they worked at Prysm Inc. as a Technical Fellow, specializing in FPGA design, from October 2013 to March 2019. From November 2003 to March 2019, Victor was the Owner/Technologist at VALDS LLC. Victor started their career as a Senior Electrical Design Engineer at Capella Intelligent Subsystems in November 2002 and worked there until October 2012. At Capella, they were responsible for the development of FPGAs for optical networking products and also designed board testers. Before that, they were a SoC Engineer at Philips Semiconductor, Trimedia Division, from August 2000 to November 2002. In this role, Victor was involved in the adaptation, simulation, and verification of IP cores and was also responsible for the design and improvement of cache and extension bus arbiter modules.

Victor Ruskovoloshin completed their Master's degree in Electrical and Electronics Engineering from the National Research Nuclear University MEPhI (Moscow Engineering Physics Institute) between 1985 and 1991.