Ujjwal Sharma

Ujjwal Sharma has worked in various roles in the engineering field since 2015. In 2015, they were a Product Development and Validation Intern at Medtronic. During this time, they accomplished operations manufacturing targets and developed manufacturing processes for the GEN2 SIGNIA projects. In 2016, they were an Electrical Engineer at Maquet Getinge Group where they successfully executed tests to specification to test the functional blocks in PCB assemblies. In 2018, they were a Hardware Development Engineer at Abbott, where they performed Electromagnetic Interference/ Electromagnetic Compatibility (EMI/EMC) Design tests. Currently, they are a Hardware Design Engineer at cPacket Networks, where they are assisting the 100G Backboard Design Architecture by using Broadcom Ethernet PHY, High Speed Connector, QFSP28 (quad small form factor pluggable) module interface, DPM (Digital Power Manager) module and JTAG Interface. Ujjwal is also performing schematic design entry using OrCAD, verifying PCB (printed circuit board) outline and layer setup and interfacing with vendors to select and use correct impedance layers. Additionally, they are measuring inrush and steady state power for 40G product line at 110V and 220V using Digital Multimeter and Current Clamp Meter.

Ujjwal Sharma obtained their Bachelor's Degree in Electrical and Electronics Engineering from Manipal Institute of Technology between 2009 and 2013. Ujjwal then went on to receive their Master's Degree in Electrical and Computer Engineering from the University of New Haven between 2014 and 2016. Ujjwal has also obtained several certifications, including Python Data Structures from Coursera in June 2022, Technical Support Fundamentals from Google in November 2020, Printed Circuit Board Design from Udemy in October 2017, and Embedded Systems - Shape The World from edX in February 2014.