James Hayes

James Hayes is an expert in high-performance embedded system design and implementation. Recruited to join DSMC from Decision Sciences International Corporation (DSIC), Mr. Hayes serves as the Chief Engineer at DSMC. At DSIC Mr. Hayes developed the embedded firmware and updates for the prototype passive SNM detector, contributed to its physics simulation and analysis systems, and was a lead designer of the next generation MMPDS prototype and production embedded systems. Mr. Hayes has designed architectures for a variety of application specific embedded sensor systems. At the Air Force Research Laboratories, Information Directorate, Wright Patterson AFB (WPAFB) in Dayton, OH he developed embedded applications including advanced RADAR, capture, simulation and processing, UAV video compression and transmission, and high performance FPGA based wavelet image compression. During his time at WPAFB, Mr. Hayes also contributed to multiple conference and symposium papers and presentations. Mr. Hayes has specific experience and knowledge in the application and development of non-linear control systems, signal and image processing, and Field Programmable Gate Array (FPGA) applications. Mr. Hayes earned his Master's in Electrical Engineering and B.S. in Computer Engineering from the University of Dayton.