Bastien Arricca

Bastien Arricca is a Standard Cells Architect at Dolphin Integration since October 2012, where responsibilities include coordinating low-power solution definitions and collaborating with multi-disciplinary technical teams. Arricca has defined and created standard cells library architecture for dense and low-power applications, including pulsed-latch based libraries and power management cells, and has shared design techniques for low-power applications at the IP-SoC conference. Prior roles include Standard Cells Designer at Dolphin Integration, where Arricca designed and validated standard cell libraries, Standard Cell Library Developer trainee at STMicroelectronics, focusing on characterizing defects, and Research Assistant at Chang Gung University, investigating graphene for Extended Gate FET applications. Educational background includes a Master’s degree in Micro and Nano-technologies from Grenoble INP - UGA and additional studies at EPFL and Politecnico di Torino in related fields.