Emilie Lorans

Emilie Lorans is a digital design engineer with extensive experience in ASIC design and low-power flows. Since May 2019, Emilie has been working at Dolphin Design, focusing on System Verilog RTL implementation and collaborating with project architects and verification teams. Prior to this, Emilie worked at Atos from April 2016 to April 2019, contributing to a European project on a supercomputer and providing support for ASIC developments aimed at the CEA/LETI. Earlier roles include engineering positions at CEA, where Emilie specialized in low power design and validation within the SILAN laboratory, and a summer internship in microelectronics. Emilie holds an engineering degree from Grenoble INP - Phelma, specializing in electrical engineering, electronics, and communications.