Yashdeep Godhal

DV Engineer at EdgeQ

Yashdeep Godhal has extensive work experience in the field of engineering and verification. Yashdeep is currently working as a DV Engineer at EdgeQ Inc. since July 2019. Prior to that, they served as a Validation Lead at Intel Corporation from April 2018 to June 2019.

Yashdeep has also worked at Qualcomm, where they held the positions of Senior Staff Engineer from November 2017 to April 2018 and Staff Engineer from March 2015 to November 2017.

Before joining Qualcomm, Yashdeep worked as an ASIC Design & Verification Consultant at Bangalore from January 2013 to March 2015. Here, they worked on functional verification of multiple blocks for high-speed networking ASIC and verification at the top/gate/package level for multiple generations of the ASIC. Yashdeep also worked on verification for blocks/top levels for an image processing chip.

Prior to this, Yashdeep worked at Qualcomm as a Senior Lead Engineer from April 2012 to January 2013 and as a Senior Engineer from November 2010 to March 2012. In these roles, they worked on functional verification of different blocks in advanced multimode 4G modem and functional and formal verification of components in various chips.

Yashdeep has also worked at Chip Design (Pvt) Ltd as a Senior Engineer from January 2010 to October 2010, where they worked on the design, verification, synthesis, and timing closure for various interfaces and IPs.

In addition to their industry experience, Yashdeep has also worked as a Visiting Researcher at IST Austria from October 2009 to December 2009 and as a Design Engineer at Chip Design (Pvt) Ltd from November 2006 to June 2009.

Yashdeep started their career as an Assistant Manager at Tata Motors from July 2006 to October 2006. Yashdeep also gained research experience as a Summer Intern at the University of Calabria from May 2005 to July 2005, where they developed and simulated strategies for the constrained supervision of networked power systems.

Yashdeep Godhal completed their Bachelor of Technology degree in Electrical Engineering from the Indian Institute of Technology, Kanpur. Yashdeep attended the institution from 2002 to 2006.

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Timeline

  • DV Engineer

    July, 2019 - present