Yee Seng Woon

Yee Seng Woon has held various roles in the semiconductor industry since 2003. Yee Seng began their career as a Senior Design Engineer at Intel Corporation, where they were responsible for FullChip Integration and scripting. In 2011, they joined Altera as a Member of Technical Staff (MTS), where they were responsible for Decision Feedback Equalizer and leading RV methodology (14nm). From 2015 to 2020, they were a Physical Design Manager at GRECTRONICS SDN BHD, where they oversaw marketing, packaging, supply chain, and fab foundry. In 2020, they joined Efinix, Inc. as a Physical Design Manager.

Yee Seng Woon graduated from the University of Lincoln in 2004 with a Bachelor of Engineering in Electrical and Electronics Engineering.