Federico Quaglio

Federico Quaglio is a SoC System Architect with over 14 years of experience in ASIC and FPGA development. They possess a robust academic background, having earned a PhD in Electronics from Politecnico di Torino and served as a Post-Doc Research Assistant in VLSI architecture design. Federico's work includes developing IPs for communications standards such as WCDMA, LTE, and 5G, and engaging in methodology development for high-level synthesis and code checking. They have also focused on high-performance channel decoders and feasibility analysis for vector processors in telecommunications.